Modern Microprocessors – A 90-Minute Guide (2001-2016)
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2007–2026One slot for every year since HN launched. Height is that year's peak points; orange marks a 100+ point or 50+ comment breakout. Select a bar to open its strongest thread.
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This is no doubt obvious to hardware folks, but one enlightening moment is when I came to understand register renaming. Previously I had the (wrong) idea that rdi, rsi, etc corresponded to physical bits. Register renaming involved some exotic notion where these registers might be saved and restored. Now I understand that rdi, rsi, etc. are nothing but compressed node identifiers in an interference graph. Ideally we'd have infinite registers: each instruction would read from previous registers and output to…
Really good read. I graduated from an ECE program (with a focus on VLSI and comp arch) in 2003, but went straight to software after that, so this was a great refresher for me, as well as explaining some of the newer stuff that hadn't been in use then. I especially liked how he explained how caches work, and the different types (direct-mapped vs. n-way associative). I remember it took me a while back in school to really grok caching…
This is a really good overview of modern processor design. I keep noticing that a lot of people don't seem to understand the CPU designs past the five stage pipeline taught in undergrad architecture courses and this document does a lot of good work in targeting the areas that folks are most likely to have misconceptions about. I do wish they covered trace caches, or as they're known partly in their more modern form, u-op (micro-op) caches, which are back…
I gave a presentation last year on this for QConLondon (before the lock down) and afterwards for the LJC virtually, if people prefer to listen/watch videos. https://speakerdeck.com/alblue/understanding-cpu-microarchit...
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100+ points or 50+ comments
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reference only — not used in Hall rules or ranking